Linkage Register Write Timing
Assume r28 = LP is initially 100.
OR(r1, r2, r3)
BEQ(r31, f, r28)
NOP
…
f: ADDC(r28, 0, r0)
XORC(r28, 0, r1)
AND(r4, r5, r6)
OR
BEQ
NOP
OR
BEQ
NOP
OR
BEQ
NOP
OR
BEQ
NOP
IF
RF
MEM
ADDC
ADDC
ADDC
ADDC
XORC
AND
XORC
AND
XORC
ALU
NOP
OR
BEQ
WB
i
i + 1
i + 2
i + 3
i + 4
i + 5
i + 6
BEQ decision
r28 gets
<PC> + 4
r28 read
r28 read
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