Srini Devadas

Srinivas Devadas

Professor, Electrical Engineering and Computer Science

Education:

School	Degree	Date
I.I.T. Madras, India	B.Tech	December 1984
University of California, Berkeley	M.S.	December 1986
University of California, Berkeley	Ph.D	August 1988

MIT Appointments:

Rank	Beginning	Ending
Assistant Professor	August 1988	June 1992
Associate Professor	July 1992	June 1995
Associate Professor with Tenure	July 1995	June 1999
Full Professor	July 1999	present

Other Related Experience (most recent):

Employer	Position	Beginning	Ending
University of California	Research Assistant	June 1985	July 1986
D.E.C.	Summer Research Staff	July 1986	August 1986
University of California	Research Assistant	August 1986	July 1988
Sandburst Corporation	Principal Engineer	September 2000	August 2001

Consulting & Patents:

Firm	Beginning	Ending
DynaLogic, Technical Advisory Board	July 1994	July 1998
Synopsys, Inc. (Marlboro, Mass.)	August 1999	January 2000
0-in Design Automation (San Jose, CA) Technical Advisory Board	July 1996	present
Tioga Tech (San Jose, CA) Technical Advisory Board	July 1999	June 2001

S. Devadas, P. Ashar and F. Fallah, "Simulation Vector Generation from HDL Descriptions for Observability-Enhanced Statement Coverage ," Patent filed June 1999.

Principal Publications (partial list):

G. E. Suh, S. Devadas, and L. Rudolph, "Analytical Cache Models with Application to Cache Partitioning." Proceedings of the 15th International Conference on Supercomputing, June 2001.

D. Chiou, P. Jain, S. Devadas, and L. Rudolph, "Application-Specific Memory Management for Embedded Systems Using Software-Controlled Caches." Proceedings of the 37th Design Automation Conf., June 2000.

G. Hadjiyiannis, P. Russo, and S. Devadas, "A methodology for accurate performance evaluation in architecture exploration" Proceedings of the 36th Design Automation Conf., pages 927--932, 1999.

Monteiro, J., and S. Devadas, "Computer-Aided Design Techniques for Low Power Sequential Logic Circuits," Kluwer Academic Publishers, 1997.