vector C0 sll 0 immed 0 -> reg 0 # r0 := 0 vector C0 sll 0 immed 1 -> reg 1 # r1 := 1 vector C0 sll 0 immed 2 -> reg 2 # r2 := 2 vector C0 sll 0 immed 3 -> reg 3 # r3 := 3 vector C0 sll 0 immed 4 -> reg 4 # r4 := 4 vector C0 sll 0 immed 5 -> reg 5 # r5 := 5 vector C0 sll 0 immed 6 -> reg 6 # r6 := 6 vector C0 sll 0 immed 7 -> reg 7 # r7 := 7 vector C0 addu immed 3 reg 5 -> reg 8 # r8 := 8 vector C0 addu reg 3 reg 6 -> reg 9 # r9 := 9 vector C0 sll 1 reg 5 -> reg 10 # r10 := 10 vector C0 or reg 8 immed 3 -> reg 11 # r11 := 11 vector C0 xor reg 6 reg 10 -> reg 12 # r12 := 12 vector C0 addu byp immed 1 -> reg 13 # r13 := 13 vector C0 addu byp immed 1 -> reg 14 # r14 := 14 vector C0 srl 2 immed 60 -> reg 15 # r15 := 15 vector C0 sll 1 reg 1 -> vector C0 sll 1 byp -> vector C0 sll 1 byp -> vector C0 sll 1 byp -> reg 16 # r16 := 16 vector C0 nxor byp immed 254 -> reg 17 # r17 := 17 vector C0 sra 4 immed 208 -> reg 18 vector C0 nand byp immed 239 -> reg 18 # r18 := 18 vector C0 addu reg 10 reg 10 -> vector C0 subu byp reg 1 -> reg 19 # r19 := 19 vector C0 subu byp immed 255 -> reg 20 # r20 := 20 vector C0 sll 2 reg 1 -> vector C0 or byp reg 1 -> vector C0 sll 2 byp -> vector C0 or byp reg 1 -> reg 21 # r21 := 21 vector C0 sra 2 immed 128 -> vector C0 nor byp reg 9 -> reg 22 # r22 := 22 vector C0 sll 0 immed 249 -> vector C0 addu byp reg 15 -> vector C0 addu byp reg 15 -> reg 23 # r23 := 23 vector C0 slt reg 2 reg 3 -> vector C0 addu byp reg 23 -> reg 24 # r24 := 24 vector C0 slt reg 3 reg 2 -> vector C0 addu byp immed 25 -> reg 25 # r25 := 25 vector C0 slt immed 255 reg 0 -> vector C0 addu byp reg 25 -> reg 26 # r26 := 26 vector C0 slt reg 0 immed 255 -> vector C0 addu byp immed 27 -> reg 27 # r27 := 27 vector C0 addu byp immed 1 -> reg 28 # r28 := 28 vector C0 addu byp immed 1 -> reg 29 # r29 := 29 vector C0 addu byp immed 1 -> reg 30 # r30 := 30 vector C0 addu byp immed 1 -> reg 31 # r31 := 31