vector C1 sll 0 immed 0 -> xport-out-cluster 0 vector C2 sll 0 immed 1 -> xport-out-cluster 0 vector C3 sll 0 immed 2 -> xport-out-cluster 0 vector C3 sll 0 immed 3 -> xport-out-cluster 0 vector C2 sll 0 immed 4 -> xport-out-cluster 0 vector C1 sll 0 immed 5 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 1 -> reg 0 vector C0 sll 0 xport-in-cluster 2 -> reg 1 vector C0 sll 0 xport-in-cluster 3 -> reg 2 vector C0 sll 0 xport-in-cluster 3 -> reg 3 vector C0 sll 0 xport-in-cluster 2 -> reg 4 vector C0 sll 0 xport-in-cluster 1 -> reg 5 vector C0 sll 0 immed 6 -> reg 6 xport-out-cluster 1 vector C0 sll 0 immed 7 -> reg 7 xport-out-cluster 1 vector C1 sll 0 xport-in-cluster 0 -> reg 6 vector C1 sll 0 xport-in-cluster 0 -> reg 7 vector C0 addu immed 3 reg 0 -> xport-out-cluster 2 vector C2 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 addu xport-in-cluster 2 reg 5 -> reg 8 vector C0 addu reg 3 reg 6 -> xport-out-cluster 3 vector C0 sll 1 reg 5 -> xport-out-cluster 2 vector C0 or reg 8 immed 3 -> xport-out-cluster 1 vector C1 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C2 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C3 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 3 -> reg 9 vector C0 sll 0 xport-in-cluster 2 -> reg 10 vector C0 sll 0 xport-in-cluster 1 -> reg 11 vector C1 sll 0 reg 6 -> xport-out-cluster 0 vector C0 xor reg 10 xport-in-cluster 1 -> reg 12 xport-out-cluster 2 vector C0 addu byp immed 1 -> reg 13 xport-out-cluster 3 vector C2 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 0 vector C3 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 addu immed 1 xport-in-cluster 2 -> reg 14 xport-out-cluster 3 vector C0 addu immed 1 xport-in-cluster 3 -> reg 15 xport-out-cluster 2 vector C3 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 0 vector C2 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 addu immed 1 xport-in-cluster 3 -> reg 16 vector C0 addu immed 1 xport-in-cluster 2 -> reg 17 vector C0 addu reg 6 reg 6 -> xport-out-cluster 1 vector C1 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 2 vector C2 addu immed 1 xport-in-cluster 1 -> xport-out-cluster 3 vector C3 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 2 vector C2 addu immed 1 xport-in-cluster 3 -> xport-out-cluster 1 vector C1 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 0 vector C0 addu immed 1 xport-in-cluster 1 -> reg 18 vector C0 addu reg 6 reg 7 -> xport-out-cluster 1 vector C0 addu reg 6 reg 8 -> xport-out-cluster 1 vector C0 addu reg 6 reg 9 -> xport-out-cluster 1 vector C0 addu reg 6 reg 10 -> xport-out-cluster 1 vector C1 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 2 vector C1 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 2 vector C1 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 2 vector C1 addu immed 1 xport-in-cluster 0 -> xport-out-cluster 2 vector C2 addu immed 1 xport-in-cluster 1 -> xport-out-cluster 3 vector C2 addu immed 1 xport-in-cluster 1 -> xport-out-cluster 3 vector C2 addu immed 1 xport-in-cluster 1 -> xport-out-cluster 3 vector C2 addu immed 1 xport-in-cluster 1 -> xport-out-cluster 3 vector C3 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 2 vector C3 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 2 vector C3 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 2 vector C3 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 2 vector C2 addu immed 1 xport-in-cluster 3 -> xport-out-cluster 1 vector C2 addu immed 1 xport-in-cluster 3 -> xport-out-cluster 1 vector C2 addu immed 1 xport-in-cluster 3 -> xport-out-cluster 1 vector C2 addu immed 1 xport-in-cluster 3 -> xport-out-cluster 1 vector C1 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 0 vector C1 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 0 vector C1 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 0 vector C1 addu immed 1 xport-in-cluster 2 -> xport-out-cluster 0 vector C0 addu immed 1 xport-in-cluster 1 -> reg 19 vector C0 addu immed 1 xport-in-cluster 1 -> reg 20 vector C0 addu immed 1 xport-in-cluster 1 -> reg 21 vector C0 addu immed 1 xport-in-cluster 1 -> reg 22 vector C1 addu reg 6 reg 7 -> xport-out-cluster 0 vector C0 addu reg 6 reg 7 -> xport-out-cluster 2 vector C2 sll 1 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 addu reg 10 xport-in-cluster 1 -> reg 23 vector C0 subu xport-in-cluster 2 reg 2 -> reg 24 vector C1 addu byp immed 12 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 1 -> reg 25 vector C0 addu byp immed 1 -> xport-out-cluster 1 vector C0 addu byp immed 1 -> xport-out-cluster 2 vector C0 addu byp immed 1 -> xport-out-cluster 3 vector C1 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C2 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C3 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 1 -> reg 26 vector C0 sll 0 xport-in-cluster 2 -> reg 27 vector C0 sll 0 xport-in-cluster 3 -> reg 28 vector C0 addu byp immed 1 -> xport-out-cluster 1 vector C1 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 1 -> reg 29 vector C0 addu byp immed 1 -> xport-out-cluster 1 vector C1 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 1 -> reg 30 vector C0 addu byp immed 1 -> xport-out-cluster 1 vector C1 sll 0 xport-in-cluster 0 -> xport-out-cluster 0 vector C0 sll 0 xport-in-cluster 1 -> reg 31