Workshop on Optimizing Stencil Computations (WOSC)
At SPLASH, Indianapolis, Indiana, October 27, 2013
Stencil computations describe a computational pattern that occurs in a wide variety of computing applications, from scientific simulations and solvers to image processing and filtering. Though conceptually simple, these computations have been traditionally difficult for general compilers to optimize, due to their difficult-to-analyze dependence structure and because the computations span many domains, each with different requirements for optimization. As a result, much effort has gone into creating strategies for optimizing these computations, including new compiler transformations, cache oblivious algorithms, and several domain-specific languages and compilers, along with software support systems including stencil-specific libraries and frameworks.
This workshop aims to create a discussion between the many efforts to optimize stencil computations as well as the various domains that could benefit from these efforts, in order to evaluate the current state-of-the-art as well as pushing new research ideas influenced by the target domains. To ensure a high-quality level of discussion, the mini-conference will consist of invited papers from the various stakeholders interested in stencil applications and optimizations, followed by discussion sessions to synthesize lessons learned.
In addition to invited papers, we are accepting a limited number of submissions, with a focus on application developers who wish to convey the specific difficulties of optimizing their stencil-based application codes. Please submit abstracts (2-pages or shorter, PDF format or plain text) via email to skamil AT mit dot EDU.
Important Dates
- Abstract Deadline: 7 September 2013
- Notification: 17 September 2013
- Tentative Schedule: 20 September 2013
Tentative Program
- 8:45am Introduction (Saman Amarasinghe, MIT)
- 9:00am-10:45am Panel 1
- "Performance Modeling of Stencils for Combustion Co-design and Ansynchronous Runtime Support," Cy Chan (Lawrence Berkeley National Laboratory) [Previously-published Paper]
- "Autotuning of Vectorization in Stencil Computations," Azamat Mametjanov (Argonne National Laboratory)
- TBD, Bryan Van Straalen (Lawrence Berkeley National Laboratory)
- "A Cross-Discipline Stencil Benchmark Suite," Shoaib Kamil (MIT)
- "Hardware Support for Collective Memory Transfers in Stencil Computations," George Michelogiannakis (Lawrence Berkeley National Laboratory) [Paper]
- 10:45am-11:15am Break
- 11:15am-12:00pm Keynote Talk, P. Sadayappan (Ohio State University)
- 12:00pm-1:15pm Lunch
- 1:15pm-3:00pm Panel 2
- "Compilers for Regular and Irregular Stencils: Shared Problems and Solutions," Michelle Strout (Colorado State University) [Paper]
- "Open64-based Regular Stencil Shape Recognition in HERCULES," Christos Kartsaklis (Oak Ridge National Laboratory) [Paper]
- "Halide: A Language and Compiler for Optimizing Parallelism, Locality, and Recomputation in Image Processing Pipelines," Jonathan Ragan-Kelley (MIT)
- "The Pochoir Stencil Compiler," Rezaul Chowdhury (Stony Brook University) [Paper]
- "Domain-specific Compiler Optimizations for Composing Stencil Operators," Mary Hall (The University of Utah) [Paper]
- 3:00pm-3:30pm Synthesis/Concluding Remarks
Organizers
- Shoaib Kamil, MIT CSAIL, Cambridge, USA
- Saman Amarasinghe, MIT CSAIL, Cambridge, USA
- Katherine Yelick, UC Berkeley EECS Dept and Lawrence Berkeley National Laboratory, Berkeley, USA
- P. (Saday) Sadayappan, Dept of Computer Science and Engineering, Ohio State University, Columbus, USA