Muralidaran Vijayaraghavan

I am a Ph.D. candidate at CSAIL, MIT. Before coming here, I was an undergraduate at the IIT, Madras. Madras (or rather Chennai) is also the city I grew up in.

Research Interests

I am interested in automated theorem proving, formal verification and high-level languages for hardware design and computer architecture My advisor is Professor Arvind. Recently, I've been working on proving the correctness of a cache coherence protocol for a multi-level cache hierarchy using the Coq Theorem prover.

Resume

[pdf]

Contact

Address:
Computer Science and Artificial Intelligence Lab
The Stata Center
Massachusetts Institute of Technology
32 Vassar Street, 32-G836
Cambridge, MA 02139

Email: {first_character_of_my_last_name}{first_six_characters_of_my_first_name} at csail dot mit dot edu