I am a fifth year Ph.D student at MIT CSAIL working in computer architecture and advised by Prof. Daniel Sanchez.
I am broadly interested in techniques that leverage application-level information to reduce
data movement in future hardware architectures.
At MIT, I worked on cache performance of graph analytics,
distributed multicore cache hierarchies
and cache partitioning on commodity hardware.
As a summer intern at Nvidia Research, I worked on hardware architectures
for deep learning.
Before coming to MIT, I graduated with Bachelors in Electrical Engineering from Indian Institute of Technology Bombay in 2014,
where my research focused on multicore architectures and VLSI Design.
While at IIT Bombay, I did summer internships at Cornell University and University of Toronto.