\iffalse

INSTRUCTIONS: (if this is not ps1, use the right file name)

  Clip out the ********* INSERT HERE ********* bits below and insert
appropriate TeX code.  Once you are done with your file, run

  ``latex template.tex''

from the Athena shell.  If your TeX code is clean, the latex will exit
back to a prompt.  Once this is done, run

  ``dvips template.dvi -o template.ps''

which should print your file to the nearest printer.  There will be
residual files called ps1.log, ps1.aux, and ps1.dvi.  All these can be
deleted, but do not delete ps1.tex.

\fi
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   \noindent
   \begin{center}
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      \vbox{
    \hbox to 5.78in { {\bf 6.823 Computer Architecture} \hfill #2 }
       \vspace{4mm}
       \hbox to 5.78in { {\Large \hfill #5  \hfill} }
       \vspace{2mm}
       \hbox to 5.78in { {\it #3 \hfill #4} }
      }
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   \end{center}
   \vspace*{4mm}
}

\newcommand{\ho}[5]{\handout{#1}{#2}{Instructor:
#3}{Teaching Assistant: #4}{Handout #1: #5}}
\newcommand{\al}{\alpha}
\newcommand{\Z}{\mathbb Z}

\begin{document}
\handout{P5}{DUE: 4/29/2002}{Problem Set 5}
{Instructors: Krste Asanovic, Srinivas Devadas}
{Group 18: Timothy Danford, Kilian Pohl, Bryan Russell}


% Problem 2
\section*{Problem 2}
\bigskip 
\# R1 pointer to X \\
\# R2 pointer to Y \\
\# R5 n \\
\# F1 - F10 Temporary Floating Point Register for LF Instruction \\
\# F30- F33 Temproary Floating Point Register for MULTF Instruction \\
\# F50, F51 Temproary Floating Point Register for ADDF Instruction \\
\# F50 result \\
LF F3,  0(R1); LF F4,  0(R2);  \\
LF F5,  4(R1); LF F6,  4(R2);  \\
LF F7,  8(R1); LF F8,  8(R2);  \\
LF F1, 12(R1); LF F2, 12(R2);  \\
LF F3, 16(R1); LF F4, 16(R2); MULTF F30,F3,F4; ADDI R5,R5,\#-7;  \\
LF F5, 20(R1); LF F6, 20(R2); MULTF F31,F5,F6; ADDI R1,R1,\#24;  \\
LF F7,  0(R1); LF F8, 24(R2); MULTF F32,F7,F8; ADDI R2,R2,\#28;  \\
loop:  \# Beginning of the loop\\
LF F1,  4(R1); LF F2, 0(R2); MULTF F30,F1,F2; ADDF F50, F50, F30;  \# Start the loop \\
LF F3,  8(R1); LF  F4,  4(R2); MULTF F31,F3, F4; ADDF F51, F51, F31;  \\
LF F5, 12(R1); LF  F6,  8(R2); MULTF F32,F5, F6; ADDF F50, F50, F32;  \\
LF F7, 16(R1); LF  F8, 12(R2); MULTF F30,F7, F8; ADDF F51, F51, F30; \\
LF F9, 20(R1); LF F10, 16(R2); MULTF F31,F1, F2; ADDF F50, F50, F31;  \\
LF F1, 24(R1); LF  F2, 20(R2); MULTF F32,F3, F4; ADDF F51, F51, F32;  \\
LF F3, 28(R1); LF  F4, 24(R2); MULTF F30,F5, F6; ADDF F50, F50, F30;ADDI R5,R5,\#-9;  \\
LF F5, 32(R1); LF  F6, 28(R2); MULTF F31,F7, F8; ADDF F51, F51, F31;ADDI R1,R1,\#36;  \\
LF F7,  0(R1); LF  F8, 32(R2); MULTF F32,F9,F10; ADDF F50, F50, F32;ADDI R2,R2,\#36; BNEZ R5,loop  \\
loopend: \# End of the loop - finish all the open opperations\\
MULTF F30,F1,F2; ADDF F50, F50, F30;  \\
MULTF F31,F3, F4; ADDF F51, F51, F31;  \\
MULTF F32,F5, F6; ADDF F50, F50, F32;  \\
MULTF F30,F7, F8; ADDF F51, F51, F30; \\
ADDF F50, F50, F31;  \\
ADDF F51, F51, F32;  \\
ADDF F50, F50, F30;  \\
ADDF F50, F50, F51  \# Result is stored in Floating point Register F50\\

We asume that for the vector lenght n the following is true : (n -7) mod 9 $=$ 0 and (n -7) div 9 $>$ 0 . If that is not given we just have to loop through the code as listed in the excersize m times so that 
(n-m-7) mod 9 $=$ 0. Additionally we would have to chek if n-m-7 $=$ 0 to return the result or to start the loop given above!
\end{document}



