b Instruction Set Architecture

OPCODE

rc

ra

rb

unused

6

5

5

5

11

Form 1:

OPCODE

rc

ra

literal C (signed)

6

5

5

16

Form 2:

OPCODE = 10xxxx

ADD: rc <ra> + <rb>

OPCODE = 11xxxx

OPCODE = 01xxxx

ADDC: rc <ra> + C

LD: rc MEM[<ra> + C]

ST: MEM[<ra> + C] rc

JMP: rc <PC> + 4; PC <ra>

BEQ: rc <PC> + 4; if <ra>=0 then

PC <PC> + 4 + C<ɚ

LDR: rc MEM[<PC> + 4 + C<ɚ]

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