Table of Contents
Multilevel Memories (Improving performance using a little “cash”)
Memory Systems: Present Day Numbers
Fundamental Issue in Computer Design
Answer: Multilevel Memory
Typical Memory Reference Patterns
Locality Properties of Patterns
Caches
Inside a Cache
Cache Algorithm (Read)
Cache Organization
Fully Associative Cache
Direct-Mapped Cache
2-Way Set-Associative Cache
Average Read Latency using a Cache
Valid Bits
Block Replacement: Selecting the Victim
Write Policy
Dirty Bits for Write-Back Caches
Cache Issues
Next Time: Virtual Memory
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Author: Srinivas Devadas
Email: devadas@mit.edu
Home Page: http://cag-www.lcs.mit.edu/6.004
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