Synthesis of Combinational Logic

2/10/98


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Table of Contents

Synthesis of Combinational Logic

Recap: Combinational Devices*

How do we specify what we want?

Truth Tables and Logic Equations

Logic Equations and AND-OR Circuits

NAND-NAND Circuit

Identities for Logic Functions

Simplifying Logic Equations

Comparison

Synthesis Flow

Multiplexors and Decoders

Read-Only Memory (ROM)

Programmable Logic Array (PLA)

Simplistic Viewpoint

Parity (XOR) Functions

Circuit Delay: Is Fanin Free?

Circuit Delay: Synopsis

Arithmetic Functions

Revisiting Parity

Binary Addition

Ripple Carry Adder Implementation

Next Time: Feedback and State

Author: Srinivas Devadas

Email: devadas@mit.edu

Home Page: http://cag-www.lcs.mit.edu/6.004

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