FILES    = testbench.v

PLIDIR   = /home/bits2/jasonm/rawhw/testing/get_stim

LIB_OPTS = -y /home/tools/ibm_sa27e/current/synthesis/synopsys_dw/src_ver \
	   -y /home/tools2/ibm_sa27e/current/verilog \
	   -y ../../components \
	   -y .. \
	   -y ../../switch \
	   +libext+.v

PLI_OPTS = -P $(PLIDIR)/get_stim.tab $(PLIDIR)/get_stim.c +acc \
	   -CC -I/home/tools/synopsys/vcs/sun_sparc_solaris_5.5.1/lib

vcs:
	vcs -Mupdate $(FILES) $(LIB_OPTS) $(PLI_OPTS)

xvcs:
	vcs -Mupdate -RI -line $(FILES) $(LIB_OPTS) $(PLI_OPTS)

clean:
	$(RM) -r csrc simv.daidir vcs.key simv
