Section 45 Want more of a challenge? View in iconic form (experimental)
# GATE simulating unless gates # for embedded image-and-logic-based primer # practice with pure logic gate # X unless Y = (X if Y=0, otherwise 0) [hear] (define unless / ? x / ? y / and (x) (not (y)));
# if second input is true, output is blocked (false) # if second input is false, output copies first input [hear] (= (false) (unless (false) (false)));
# To do: add a simple simulator for non-grid-based # logic -- much simpler to understand than # grid-based # On to a grid-based logic simulation # first, need unbounded, mutable matrices [hear] (define make-matrix / ? default / (make-cell (hash-default (default))));
# wrap up both phases of simulation [hear] (define simulate-unless / ? circuit / assign state (unless-phase-1 (circuit)) / unless-phase-2 (circuit) (state));
# A circuit is a list of gates # Each gate is a list (x1 y1 x2 y2 v) # where the coordinates (x1,y1) and (x2,y2) represent # start and end points of a wire on a plane, carrying a # logic value v. # Wires copy values from their start point. # | # | (A) # V # -->--> # (B)(C) # # Wire C here copies from wire B. # If wire A is on, it blocks (sets to 0) C. [hear] (assign circuit1 (vector (vector 2 2 4 2 (true)) (vector 4 2 6 2 (true)) (vector 6 2 8 2 (true)) (vector 6 4 6 2 (true))) / assign circuit2 (vector (vector 2 2 4 2 (true)) (vector 4 2 6 2 (true)) (vector 6 2 8 2 (false)) (vector 6 4 6 2 (true))) / equal (simulate-unless (circuit1)) (circuit2));
# okay, now let us make a simple image class # we are going to encode each row as a single binary number, # rather than a vector, so that images will be pretty # obvious in the raw, uninterpreted message [hear] (define bit-get / lambda (n offset) / assign div2 (div (n) 2) (if (= 0 / offset) (not / = (n) / * 2 / div2) (bit-get (div2) / - (offset) 1)));