Logic Synthesis

Logic Synthesis

S. Y. Liao and S. Devadas, "Solving Covering Problems Using LPR-Based Lower Bounds" , Proceedings of the 34th Design Automation Conference, June 1997.

S. Y. Liao, S. Devadas and A. Ghosh, "Boolean Factorization Using Multiple-Valued Minimization", Proceedings of the International Conference on Computer-Aided Design, pp. 606-611, November 1993.