Here is a current list of my publications. <br> <br> <br>

Conferences:
  <ul id="refereed">
    <li> 
    <b>Leveraging Latency-Insensitivity to Ease Multiple FPGA Design</b> <br> 
        Kermin Fleming, Michael Adler, Michael Pellauer, Angshuman Parashar, Arvind, Joel Emer<br>
       <i>International Symposium on Field Programmable Gate Arrays  (ISFPGA 2012)</i> <br>
       Monterrey, CA, USA.  February 2012 <br>
       [<a href="papers/multifpga_12.pdf">pdf</a>]<br><br>


    <li>
    <b>WiLIS: Architectural Modelling of Wireless Systems</b> <br> 
        Kermin Fleming, Man Cheuk Ng, Samuel Gross, Arvind<br>
       <i>International Symposium on Performance Analysis of Systems and Software  (ISPASS 2011)</i> <br>
       Austin, TX, USA.  April 2011 <br>
       [<a href="papers/wilis_11.pdf">pdf</a>]<br><br>

    <li>
    <b>LEAP Scratchpads: Automatic Memory and Cache Management for Reconfigurable Logic</b> <br> 
        Michael Adler, Kermin Fleming, Angshuman Parashar, Micheal Pellauer, Joel Emer<br>
       <i>International Symposium on Field Programmable Gate Arrays  (ISFPGA 2011)</i> <br>
       Monterrey, CA, USA.  February 2011 <br>
       [<a href="papers/scratchpads_11.pdf">pdf</a>]<br><br>


    <li>
    <b>Airblue: A System For Cross-Layer Wireless Protocol Development</b> <br> 
       Man Cheuk Ng, Kermin Fleming, Mythili Vutukuru, <br>
       Samuel Gross, Arvind, Hari Balakrishnan<br>
       <i>Symposium on Architectures for Networking and Communications Systems  (ANCS 2010)</i> <br>
       San Diego, CA, USA.  October 2010 <br>
       <b>Best Paper Award</b><br>
       [<a href="papers/airblue_10.pdf">pdf</a>]<br><br>
    <li>

    <b>H.264 Decoder: A Case Study in Multiple Design Points</b> <br> 
       Kermin Fleming, Chun-Chieh Lin, Nirav Dave, 
       Gopal Raghavan, Jamey Hicks, Arvind<br>
       <i>Formal Methods and Models for Codesign (MEMOCODE 2008)</i> <br>
       Anaheim, CA, USA.  June 2008 <br>
       [<a href="papers/h264_08.pdf">pdf</a>]<br><br>
  </ul>

Journal Articles:
  <ul id="journals">
    <li> 
    <b>Improving Performance and Lifetime of Solid-state Drives Using Hardware-accelerated Compression</b> <br>
    Sungjin Lee, Jihoon Park, Kermin Fleming, Arvind, Jihong Kim<br>
    <i>IEEE Transactions on Consumer Electronics</i> <br> 
    Novemeber 2011 <br>
    [<a href="papers/bluezip_11.pdf">pdf</a>]
    <br><br>

  </ul>


Workshops and other things:
  <ul id="workshops">
    <li> 
    <b>LEAP: A Virtual Platform Architecture for FPGAs</b> <br>
    Angshuman Parashar, Michael Adler, Kermin Fleming, Michael Pellauer, Joel Emer<br>
    <i>Workshop on the Intersections of Computer Architecture and Reconfigurable Logic (CARL 2010)</i> <br> 
    Atlanta, USA. December 2010 <br>
    [<a href="papers/leap_10.pdf">pdf</a>]
    <br><br>

    <li> 
    <b>BlueSSD: An Open Platform for Cross-layer Experiments for NAND Flash-b\
ased SSDs</b> <br>
    Sungjin Lee, Kermin Fleming, Jihoon Park, Steven Swanson, Arvind,  Jihong Kim <br>
    <i>Workshop on Architectural Research Prototyping (WARP)</i> <br> 
    St. Malo, France. June 2010 <br>
    [<a href="papers/bluessd_10.pdf">pdf</a>]
    <br><br>

    <li> 
    <b>Implementing a Fast Cartesian-Polar Matrix Interpolator</b> <br>
    Ahbinav Aggarwal, Nirav Dave, Kermin Fleming, Asif Khan, Myron King, Man Cheuk Ng, Murali Vijayaraghavan <br>
    <i>Formal Methods and Models for Co-Design (MEMOCODE 2009) </i> <br> 
    Boston, USA. June 2009 <br>
    [<a href="papers/cartesian_09.pdf">pdf</a>]
    <br><br>

    <li> 
    <b>The MD6 Hash Function</b> <br>
    Ron Rivest et al. <br>
    <i>Technical Report </i> <br> 
    Cambridge, USA. October 2008 <br>
    [<a href="papers/md6_08.pdf">pdf</a>]
    <br><br>

    <li> 
    <b>High-throughput Pipelined Mergesort</b> <br>
    Kermin Fleming, Myron King, Man Cheuk Ng, Asif Khan, Murali Vijayaraghavan <br>
    <i>Formal Methods and Models for Co-Design (MEMOCODE 2008) </i> <br> 
    Anaheim, USA. June 2008 <br>
    [<a href="papers/mergesort_08.pdf">pdf</a>]
    <br><br>

    <li>
    <b>Hardware Accelleration of Matrix Multiplication on a Xilinx FPGA</b> <br>
    Nirav Dave, Kermin Fleming, Myron King, Michael Pellauer, Muralidaran Vijayaraghavan <br>
    <i>Formal Methods and Models for Codesign (MEMOCODE 2007)</i> <br>
    Nice, France.  May 2007 <br>
    [<a href="papers/matrix_07.pdf">pdf</a>]
    <br><br>


  </ul>