Thomas' webpage

My research is between computer architecture and programming languages.
I work on leveraging high-level hardware programming languages and formal methods to design hardware, that I can then formally prove is veryfing its specification.
I am interested in looking at domain-specifc hardware accelerators, and security-oriented properties to apply the methodology.

I am applying for faculty positions this year (2021-2022). CV as of 03/2021.

Selected publications

ASPLOS2022 DAGguise: Mitigating Memory Timing Side Channels
Peter W. Deutsch, Yuheng Yang, Thomas Bourgeat, Jules Drean, Joel Emer, Mengjia Yan
ISCA2021 FlexMiner: A Pattern-Aware Accelerator for Graph Pattern Mining
Xuhao Chen, Tianhao Huang, Shuotao Xu, Thomas Bourgeat, Chanwoo Chung, Arvind
ICRA2021 Accelerating Robot Dynamics Gradients: Hardware-Sofware Co-Design on a CPU, GPU, and FPGA
Brian Plancher, Sabrina Neuman, Thomas Bourgeat, Scott Kuindersma, Srini Devadas, Vijay Janapa Reddi [pdf]
ASPLOS2021 Effective Simulation and Debugging for High-Level Hardware Languages Using Software Compilers
Clément Pit-Claudel, Thomas Bourgeat, Stella Lau, Arvind, Adam Chlipala [pdf]
ASPLOS2021 Robomorphic Computing: A Design Methodology for Domain-Specific Accelerators Parameterized by Robot Morphology
Sabrina M. Neuman, Brian Plancher, Thomas Bourgeat, Thierry Tambe, Srini Devadas, Vijay Janapa Reddi [pdf]
MICRO2020 CaSA: End-to-end Quantitative Security Analysis of Randomly Mapped Caches
Thomas Bourgeat, Jules Drean, Yuheng Yang, Lillian Tsai, Joel Emer, Mengjia Yan [pdf]
MICRO2020 AQUOMAN An Analytic-Query Offloading Machine
Shuotao Xu, Thomas Bourgeat, Tianhao Huang, Hojun Kim, Sungjin Lee, Arvind [pdf]
PLDI2020 The essence of Bluespec: a core language for rule-based hardware design
Thomas Bourgeat, Clément Pit-Claudel, Adam Chlipala, Arvind [pdf]
MICRO2019 MI6: Secure Enclaves in a Speculative Out-of-Order Processor
Thomas Bourgeat, Ilia A. Lebedev, Andrew Wright, Sizhuo Zhang, Arvind, Srini Devadas [pdf]
MICRO2018 Composable Building Blocks to Open up Processor Design
Sizhuo Zhang, Andrew Wright, Thomas Bourgeat, Arvind [pdf]
ASYNC2016 Specification mining for asynchronous controllers
Javier San Pedro, Thomas Bourgeat, Jordi Cortadella [pdf]

Other publications

Preprint 2021 A Multipurpose Formal RISC-V specification
Thomas Bourgeat, Ian Clester, Andres Erbsen, Samuel Gruetter, Andrew Wright, Adam Chlipala [pdf]
CoqPL2021 An experience report on writing usabe DSLs in Coq
Clément Pit-Claudel, Thomas Bourgeat [pdf]
Draft-2014 A probabilistic Hadwiger-Nelson problem
Thomas Bourgeat, Paul Melotti, Marc Heinrich [pdf]
SEC2014 New Algorithmic Approaches to Point Constellation Recognition
Thomas Bourgeat, Julien Bringer, Herve Chabanne, Robin Champenois, Jeremie Clement, Houda Ferradi, Marc Heinrich, Paul Melotti, David Naccache, Antoine Voizard