Daniel Sanchez

Professor, MIT EECS

I am a Professor at MIT's Electrical Engineering and Computer Science Department and a member of the Computer Science and Artificial Intelligence Laboratory. I work in computer architecture and computer systems. My current research focuses on large-scale multicores with hundreds to thousands of cores, scalable and efficient memory hierarchies, architectures with quality-of-service guarantees, and scalable runtimes and schedulers.

Before joining MIT in September 2012, I earned a Ph.D. in Electrical Engineering from Stanford University, where I worked with Professor Christos Kozyrakis. I have also received an M.S. in Electrical Engineering from Stanford (2009) and a B.S. in Telecommunications Engineering from the Technical University of Madrid, UPM (2007).

You can access my Curriculum Vitae here.

Teaching

• Fall 2024: 6.5900 Computer System Architecture
  
• Spring 2024: 6.191 Computation Structures
  
• Fall 2023: 6.5900 Computer System Architecture
  
• Spring 2023: 6.191 Computation Structures
  
• Fall 2022: 6.191 Computation Structures
  
• Spring 2022: 6.004 Computation Structures
  
• Fall 2021: 6.823 Computer System Architecture
  
• Spring 2021: 6.823 Computer System Architecture
  
• Fall 2020: 6.004 Computation Structures
  
• Spring 2020: 6.823 Computer System Architecture
  
• Fall 2019: 6.004 Computation Structures
  
• Spring 2019: 6.823 Computer System Architecture
  
• Fall 2018: 6.004 Computation Structures
  
• Spring 2018: 6.S084 Computation Structures (special)
  
• Fall 2017: 6.004 Computation Structures
  
• Spring 2017: 6.823 Computer System Architecture
  
• Spring 2016: 6.823 Computer System Architecture
  
• Fall 2015: 6.004 Computation Structures
  
• Spring 2015: 6.823 Computer System Architecture
  
• Fall 2014: 6.004 Computation Structures
  
• Spring 2014: 6.823 Computer System Architecture
  
• Fall 2013: 6.004 Computation Structures
  
• Spring 2013: 6.888 Parallel and Heterogeneous Computer Architecture
  
• Fall 2012: 6.004 Computation Structures (recitations)
  

Students

• Axel Feldmann (Ph.D.)
  
• Hyun Ryong (Ryan) Lee (Ph.D.)
  
• Fares Elsabbagh (Ph.D., co-advised with Joel Emer)
  
• Shabnam Sheikhha (Ph.D.)
  
• Xingran (Maggie) Du (S.M./Ph.D., co-advised with Joel Emer)
  
• Aleksandar Krastev (S.M./Ph.D.)
  
• Courtney Golden (S.M./Ph.D., co-advised with Joel Emer)
  
• Viansa Schmulbach (S.M./Ph.D., co-advised with Christina Delimitrou)
  

Alumni

• Nathan Beckmann (Ph.D. 2015, Post-Doc 2015-2016)
  
• Harshad Kasture (Ph.D. 2017)
  
• Suvinay Subramanian (Ph.D. 2018)
  
• Po-An Tsai (Ph.D. 2019)
  
• Mark Jeffrey (Ph.D. 2019)
  
• Guowei Zhang (Ph.D. 2020)
  
• Maleen Abeydeera (Ph.D. 2021)
  
• Quan M. Nguyen (Ph.D. 2022, Post-Doc 2022-2023)
  
• Victor Ying (Ph.D. 2023)
  
• Nikola Samardzic (Ph.D. 2024)
  
• Yifan Yang (Ph.D. 2024)
  
• Nosayba El-Sayed (Post-Doc 2018)
  
• Cong Yan (S.M. 2015)
  
• Anurag Mukkara (S.M. 2016)
  
• Webb Horn (M.Eng. 2015)
  
• Virginia Chiu (M.Eng. 2016)
  
• Yee Ling Gan (M.Eng. 2018)
  
• Domenic Nutile (M.Eng. 2020)
  
• Robert Durfee (M.Eng. 2022)
  
• Aleksandar Krastev (M.Eng. 2023)
  
• Nithya Attaluri (M.Eng. 2023)
  
• Alan Y. Zhu (M.Eng. 2024)
  

Publications

• Azul: An Accelerator for Sparse Iterative Solvers Leveraging Distributed On-Chip Memory, Axel Feldmann, Courtney Golden, Yifan Yang, Joel S. Emer, Daniel Sanchez, in Proceedings of the 57th annual IEEE/ACM international symposium on Microarchitecture (MICRO-57), October 2024 (to appear)

• Terminus: A Programmable Accelerator for Read and Update Operations on Sparse Data Structures, Hyun Ryong Lee, Daniel Sanchez, in Proceedings of the 57th annual IEEE/ACM international symposium on Microarchitecture (MICRO-57), October 2024 (to appear)

• Accelerating Zero-Knowledge Proofs Through Hardware-Algorithm Co-Design, Nikola Samardzic, Simon Langowski, Srinivas Devadas, Daniel Sanchez, in Proceedings of the 57th annual IEEE/ACM international symposium on Microarchitecture (MICRO-57), October 2024 (to appear)

• Trapezoid: A Versatile Accelerator for Dense and Sparse Matrix Multiplications, Yifan Yang, Joel S. Emer, Daniel Sanchez, in Proceedings of the 51st International Symposium in Computer Architecture (ISCA-51), June 2024

• A Tensor Compiler with Automatic Data Packing for Simple and Efficient Fully Homomorphic Encryption, Aleksandar Krastev, Nikola Samardzic, Simon Langowski, Srinivas Devadas, Daniel Sanchez, in Proceedings of the ACM on Programming Languages, Volume 8 (PLDI), June 2024

• BitPacker: Enabling High Arithmetic Efficiency in Fully Homomorphic Encryption Accelerators, Nikola Samardzic, Daniel Sanchez, in Proceedings of the 29th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-29), April 2024

• Accelerating RTL Simulation with Hardware-Software Co-Design, Fares Elsabbagh, Shabnam Sheikhha, Victor A. Ying, Quan M. Nguyen, Joel S. Emer, Daniel Sanchez, in Proceedings of the 56th annual IEEE/ACM international symposium on Microarchitecture (MICRO-56), October 2023
  [paper] [bibtex]

• Spatula: A Hardware Accelerator for Sparse Matrix Factorization, Axel Feldmann, Daniel Sanchez, in Proceedings of the 56th annual IEEE/ACM international symposium on Microarchitecture (MICRO-56), October 2023
  [paper] [bibtex]

• Phloem: Automatic Acceleration of Irregular Applications with Fine-Grain Pipeline Parallelism, Quan M. Nguyen, Daniel Sanchez, in Proceedings of the 29th international symposium on High Performance Computer Architecture (HPCA-29), February 2023
  [paper] [bibtex]

• ISOSceles: Accelerating Sparse CNNs through Inter-Layer Pipelining, Yifan Yang, Joel Emer, Daniel Sanchez, in Proceedings of the 29th international symposium on High Performance Computer Architecture (HPCA-29), February 2023
  [paper] [bibtex]

• Designing Hardware for Cryptography and Cryptography for Hardware, Srinivas Devadas, Simon Langowski, Nikola Samardzic, Sacha Servan-Schreiber, Daniel Sanchez, Invited article to the ACM Conference on Computer and Communications Security (CCS)
  [paper] [bibtex]

• Datamime: Generating Representative Benchmarks by Automatically Synthesizing Datasets, Hyun Ryong Lee, Daniel Sanchez, in Proceedings of the 55th annual IEEE/ACM international symposium on Microarchitecture (MICRO-55), October 2022
  [paper] [code] [bibtex]

• CraterLake: A Hardware Accelerator for Efficient Unbounded Computation on Encrypted Data, Nikola Samardzic, Axel Feldmann, Aleksandar Krastev, Nathan Manohar, Nicholas Genise, Srinivas Devadas, Karim Eldefrawy, Christopher Peikert, Daniel Sanchez, in Proceedings of the 49th International Symposium in Computer Architecture (ISCA-49), June 2022
  [paper] [bibtex]

• An Architecture to Accelerate Computation on Encrypted Data, Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srinivas Devadas, Ronald Dreslinski, Christopher Peikert, Daniel Sanchez, in IEEE Micro's Top Picks from the Computer Architecture Conferences, May/June 2022
  [paper] [bibtex]

• Fifer: Practical Acceleration of Irregular Applications on Reconfigurable Architectures, Quan M. Nguyen, Daniel Sanchez, in Proceedings of the 54th annual IEEE/ACM international symposium on Microarchitecture (MICRO-54), October 2021
  [paper] [talk] [bibtex]

• F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption, Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srinivas Devadas, Ronald Dreslinski, Christopher Peikert, Daniel Sanchez, in Proceedings of the 54th annual IEEE/ACM international symposium on Microarchitecture (MICRO-54), October 2021 (selected for IEEE Micro’s Top Picks special issue of "most significant papers in computer architecture based on novelty and long-term impact" from 2021)
  [paper] [talk] [bibtex]

• F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption (Extended Version), Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srinivas Devadas, Ronald Dreslinski, Karim Eldefrawy, Nicholas Genise, Christopher Peikert, Daniel Sanchez, arXiv:2109.05371
  [paper] [bibtex]

• SpZip: Architectural Support for Effective Data Compression In Irregular Applications, Yifan Yang, Joel S. Emer, Daniel Sanchez, in Proceedings of the 48th International Symposium in Computer Architecture (ISCA-48), June 2021
  [paper] [talk] [bibtex]

• Taming the Zoo: A Unified Graph Compiler Framework for Novel Architectures, Ajay Brahmakshatriya, Emily Furst, Victor Ying, Claire Hsu, Changwan Hong, Max Ruttenberg, Yunming Zhang, Tommy Jung, Dustin Richmond, Michael Taylor, Julian Shun, Mark Oskin, Daniel Sanchez, Saman Amarasinghe, in Proceedings of the 48th International Symposium in Computer Architecture (ISCA-48), June 2021
  [paper] [talk] [bibtex]

• Leaking Secrets Through Compressed Caches, Po-An Tsai, Andres Sanchez, Christopher W. Fletcher, Daniel Sanchez, in IEEE Micro's Top Picks from the Computer Architecture Conferences, May/June 2021
  [paper] [bibtex]

• Gamma: Leveraging Gustavson's Algorithm to Accelerate Sparse Matrix Multiplication, Guowei Zhang, Nithya Attaluri, Joel S. Emer, Daniel Sanchez, in Proceedings of the 26th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-26), April 2021
  [paper] [bibtex]

• Pipette: Improving Core Utilization on Irregular Applications through Intra-Core Pipeline Parallelism, Quan M. Nguyen, Daniel Sanchez, in Proceedings of the 53rd annual IEEE/ACM international symposium on Microarchitecture (MICRO-53), October 2020
  [paper] [talk] [bibtex]

• There’s plenty of room at the Top: What will drive computer performance after Moore’s law?, Charles E. Leiserson, Neil C. Thompson, Joel S. Emer, Bradley C. Kuszmaul, Butler W. Lampson, Daniel Sanchez, Tao B. Schardl, in Science, 368(1079), June 2020
  [paper] [bibtex]

• T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware, Victor A. Ying, Mark C. Jeffrey, Daniel Sanchez, in Proceedings of the 47th International Symposium in Computer Architecture (ISCA-47), June 2020
  [paper] [talk] [bibtex]

• Chronos: Efficient Speculative Parallelism for Accelerators, Maleen Abeydeera, Daniel Sanchez, in Proceedings of the 25th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-25), March 2020
  [paper] [talk] [bibtex]

• Safecracker: Leaking Secrets Through Compressed Caches, Po-An Tsai, Andres Sanchez, Christopher W. Fletcher, Daniel Sanchez, in Proceedings of the 25th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-25), March 2020 (selected for IEEE Micro’s Top Picks special issue of "most significant papers in computer architecture based on novelty and long-term impact" from 2020)
  [paper] [talk] [bibtex]

• Livia: Data-Centric Computing Throughout the Memory Hierarchy, Elliot Lockerman, Axel Feldmann, Mohammad Bakhshalipour, Alexandru Stanescu, Shashwat Gupta, Daniel Sanchez, Nathan Beckmann, in Proceedings of the 25th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-25), March 2020
  [paper] [talk] [bibtex]

• PHI: Architectural Support for Synchronization-and Bandwidth-Efficient Commutative Scatter Updates, Anurag Mukkara, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 52nd annual IEEE/ACM international symposium on Microarchitecture (MICRO-52), October 2019
  [paper] [talk] [bibtex]

• Leveraging Caches to Accelerate Hash Tables and Memoization, Guowei Zhang, Daniel Sanchez, in Proceedings of the 52nd annual IEEE/ACM international symposium on Microarchitecture (MICRO-52), October 2019
  [paper] [talk] [bibtex]

• Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy, Po-An Tsai, Daniel Sanchez, in Proceedings of the 24th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-24), April 2019
  [paper] [talk] [bibtex]

• Exploiting Locality in Graph Analytics through Hardware-Accelerated Traversal Scheduling, Anurag Mukkara, Nathan Beckmann, Maleen Abeydeera, Xiaosong Ma, Daniel Sanchez, in Proceedings of the 51st annual IEEE/ACM international symposium on Microarchitecture (MICRO-51), October 2018
  [paper] [talk] [bibtex]

• Rethinking the Memory Hierarchy for Modern Languages, Po-An Tsai, Yee Ling Gan, Daniel Sanchez, in Proceedings of the 51st annual IEEE/ACM international symposium on Microarchitecture (MICRO-51), October 2018
  [paper] [talk] [bibtex]

• Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies, Po-An Tsai, Changping Chen, Daniel Sanchez, in Proceedings of the 51st annual IEEE/ACM international symposium on Microarchitecture (MICRO-51), October 2018
  [paper] [talk] [bibtex]

• Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism, Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel Emer, Daniel Sanchez, in Proceedings of the 51st annual IEEE/ACM international symposium on Microarchitecture (MICRO-51), October 2018
  [paper] [talk] [bibtex]

• Sundial: Harmonizing Concurrency Control and Caching in a Distributed OLTP Database Management System, Xiangyao Yu, Yu Xia, Andrew Pavlo, Daniel Sanchez, Larry Rudolph, Srinivas Devadas, in Proceedings of the VLDB Endowment (PVLDB), June 2018
  [paper] [bibtex]

• KPart: A Hybrid Cache Partitioning-Sharing Technique for Commodity Multicores, Nosayba El-Sayed, Anurag Mukkara, Po-An Tsai, Harshad Kasture, Xiaosong Ma, Daniel Sanchez, in Proceedings of the 24th international symposium on High Performance Computer Architecture (HPCA-24), February 2018
  [paper] [talk] [bibtex] [code]

• Leveraging Hardware Caches for Memoization, Guowei Zhang, Daniel Sanchez, in Computer Architecture Letters (CAL), 17(1), 2018
  [preprint] [bibtex]

• Understanding Object-level Memory Access Patterns Across the Spectrum, Xu Ji, Chao Wang, Nosayba El-Sayed, Xiaosong Ma, Youngjae Kim, Sudharshan Vazhkudai, Wei Xue, Daniel Sanchez, in Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC'17), November 2017
  [paper] [bibtex]

• Using Application-Level Thread Progress Information to Manage Power and Performance, Sabrina M. Neuman, Jason E. Miller, Daniel Sanchez, Srinivas Devadas, in Proceedings of the 35th IEEE International Conference on Computer Design (ICCD-35), November 2017
  [paper] [bibtex]

• Nexus: A New Approach to Replication in Distributed Shared Caches, Po-An Tsai, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 26th international conference on Parallel Architectures and Compilation Techniques (PACT-26), September 2017
  [paper] [talk] [bibtex]

• SAM: Optimizing Multithreaded Cores for Speculative Parallelism, Maleen Abeydeera, Suvinay Subramanian, Mark C. Jeffrey, Joel Emer, Daniel Sanchez, in Proceedings of the 26th international conference on Parallel Architectures and Compilation Techniques (PACT-26), September 2017
  [paper] [bibtex]

• Improving Datacenter Efficiency through Partitioning-Aware Scheduling, Harshad Kasture, Xu Ji, Nosayba El-Sayed, Nathan Beckmann, Xiaosong Ma, Daniel Sanchez, in Proceedings of the 26th international conference on Parallel Architectures and Compilation Techniques (PACT-26), September 2017 (short paper)
  [paper] [bibtex]

• Fractal: An Execution Model for Fine-Grain Nested Speculative Parallelism, Suvinay Subramanian, Mark C. Jeffrey, Maleen Abeydeera, Hyun Ryong Lee, Victor A. Ying, Joel Emer, Daniel Sanchez, in Proceedings of the 44th International Symposium in Computer Architecture (ISCA-44), June 2017
  [paper] [talk] [bibtex]

• Jenga: Software-Defined Cache Hierarchies, Po-An Tsai, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 44th International Symposium in Computer Architecture (ISCA-44), June 2017
  [paper] [talk] [bibtex]

• Cache-Guided Scheduling: Exploiting Caches to Maximize Locality in Graph Processing, Anurag Mukkara, Nathan Beckmann, Daniel Sanchez, in 1st International Workshop on Architectures for Graph Processing (AGP 2017), held in conjunction with ISCA 2017, June 2017
  [paper] [talk] [bibtex]

• Maximizing Cache Performance Under Uncertainty, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 23rd international symposium on High Performance Computer Architecture (HPCA-23), February 2017
  [paper] [talk] [bibtex] [code]

• Data-Centric Execution of Speculative Parallel Programs, Mark C. Jeffrey, Suvinay Subramanian, Maleen Abeydeera, Joel Emer, Daniel Sanchez, in Proceedings of the 49th annual IEEE/ACM international symposium on Microarchitecture (MICRO-49), October 2016 (IEEE Micro’s Top Picks 2016 Honorable Mention)
  [paper] [talk] [bibtex]

• Exploiting Semantic Commutativity in Hardware Speculation, Guowei Zhang, Virginia Chiu, Daniel Sanchez, in Proceedings of the 49th annual IEEE/ACM international symposium on Microarchitecture (MICRO-49), October 2016 (IEEE Micro’s Top Picks 2016 Honorable Mention)
  [paper] [talk] [bibtex]

• TailBench: A Benchmark Suite and Evaluation Methodology for Latency-Critical Applications, Harshad Kasture, Daniel Sanchez, in Proceedings of the IEEE International Symposium on Workload Characterization (IISWC), September 2016 (Best Paper Nominee)
  [paper] [talk] [bibtex] [code]

• TicToc: Time-Traveling Optimistic Concurrency Control, Xiangyao Yu, Andrew Pavlo, Daniel Sanchez, Srinivas Devadas, in Proceedings of the 2016 ACM SIGMOD/PODS conference, June 2016
  [paper] [talk] [bibtex]

• Unlocking Ordered Parallelism with the Swarm Architecture, Mark C. Jeffrey, Suvinay Subramanian, Cong Yan, Joel Emer, Daniel Sanchez, in IEEE Micro's Top Picks from the Computer Architecture Conferences, May/June 2016
  [paper] [bibtex]

• Cache Calculus: Modeling Caches through Differential Equations, Nathan Beckmann, Daniel Sanchez, in Computer Architecture Letters (CAL), 2016
  [preprint] [bibtex]

• Whirlpool: Improving Dynamic Cache Management with Static Data Classification, Anurag Mukkara, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 21st international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-21), April 2016
  [paper] [talk] [bibtex] [code]

• Modeling Cache Performance Beyond LRU, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 22nd international symposium on High Performance Computer Architecture (HPCA-22), March 2016
  [paper] [talk] [bibtex] [code]

• Exploiting Commutativity to Reduce the Cost of Updates to Shared Data in Cache-Coherent Systems, Guowei Zhang, Webb Horn, Daniel Sanchez, in Proceedings of the 48th annual IEEE/ACM international symposium on Microarchitecture (MICRO-48), December 2015 (Best Paper Award)
  [paper] [talk] [bibtex]

• A Scalable Architecture for Ordered Parallelism, Mark C. Jeffrey, Suvinay Subramanian, Cong Yan, Joel Emer, Daniel Sanchez, in Proceedings of the 48th annual IEEE/ACM international symposium on Microarchitecture (MICRO-48), December 2015 (selected for IEEE Micro’s Top Picks special issue of "most significant papers in computer architecture based on novelty and long-term impact" from 2015)
  [paper] [talk] [bibtex]

• Rubik: Fast Analytical Power Management for Latency-Critical Systems, Harshad Kasture, Davide B. Bartolini, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 48th annual IEEE/ACM international symposium on Microarchitecture (MICRO-48), December 2015
  [paper] [talk] [bibtex]

• Tarcil: Reconciling Scheduling Speed and Quality in Large, Shared Clusters, Christina Delimitrou, Daniel Sanchez, Christos Kozyrakis, in Proceedings of the 2015 ACM Symposium on Cloud Computing (SoCC), August 2015
  [paper] [talk] [bibtex]

• Scaling Distributed Cache Hierarchies through Computation and Data Co-Scheduling, Nathan Beckmann, Po-An Tsai, Daniel Sanchez, in Proceedings of the 21st international symposium on High Performance Computer Architecture (HPCA-21), February 2015
  [paper] [talk] [bibtex]

• Talus: A Simple Way to Remove Cliffs in Cache Performance, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 21st international symposium on High Performance Computer Architecture (HPCA-21), February 2015
  [paper] [talk] [bibtex]

• Ubik: Efficient Cache Sharing with Strict QoS for Latency-Critical Workloads, Harshad Kasture, Daniel Sanchez, in Proceedings of the 19th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-19), March 2014
  [paper] [talk] [bibtex]

• Jigsaw: Scalable Software-Defined Caches, Nathan Beckmann, Daniel Sanchez, in Proceedings of the 22nd international conference on Parallel Architectures and Compilation Techniques (PACT-22), September 2013
  [paper] [talk] [bibtex]

• Jigsaw: Scalable Software-Defined Caches (Extended Version), Nathan Beckmann, Daniel Sanchez, Technical Report MIT-CSAIL-TR-2013-017, Massachusetts Institute of Technology, July 2013
  [paper] [bibtex]

• ZSim: Fast and Accurate Microarchitectural Simulation of Thousand-Core Systems, Daniel Sanchez, Christos Kozyrakis, in Proceedings of the 40th International Symposium in Computer Architecture (ISCA-40), June 2013
  [paper] [talk] [bibtex] [code]

• Hardware and Software Techniques for Scalable Thousand-Core Systems, Daniel Sanchez, Ph.D. Thesis, Stanford University, August 2012
  [thesis] [defense talk] [bibtex]

• Scalable and Efficient Fine-Grain Cache Partitioning with Vantage, Daniel Sanchez, Christos Kozyrakis, in IEEE Micro's Top Picks from the Computer Architecture Conferences, May/June 2012
  [paper] [bibtex]

• SCD: A Scalable Coherence Directory with Flexible Sharer Set Encoding, Daniel Sanchez, Christos Kozyrakis, in Proceedings of the 18th international symposium on High Performance Computer Architecture (HPCA-18), February 2012
  [paper] [talk] [bibtex]

• Dynamic Fine-Grain Scheduling of Pipeline Parallelism, Daniel Sanchez, David Lo, Richard M. Yoo, Jeremy Sugerman, Christos Kozyrakis, in Proceedings of the 20th international conference on Parallel Architectures and Compilation Techniques (PACT-20), October 2011
  [paper] [talk] [bibtex]

• Vantage: Scalable and Efficient Fine-Grain Cache Partitioning, Daniel Sanchez, Christos Kozyrakis, in Proceedings of the 38th International Symposium in Computer Architecture (ISCA-38), June 2011 (selected for IEEE Micro’s Top Picks special issue of "most significant papers in computer architecture based on novelty and long-term impact" from 2011)
  [paper] [talk] [bibtex]

• The ZCache: Decoupling Ways and Associativity, Daniel Sanchez, Christos Kozyrakis, in Proceedings of the 43rd annual IEEE/ACM international symposium on Microarchitecture (MICRO-43), December 2010
  [paper] [talk] [bibtex]

• Evaluating Bufferless Flow Control for On-Chip Networks, George Michelogiannakis, Daniel Sanchez, William J. Dally, Christos Kozyrakis, in Proceedings of the 4th ACM/IEEE international symposium on Networks-on-Chip (NOCS-2010), May 2010
  [paper] [talk] [bibtex]

• An Analysis of On-Chip Interconnection Networks for Large-Scale Chip Multiprocessors, Daniel Sanchez, George Michelogiannakis, Christos Kozyrakis, in ACM Transactions on Architecture and Code Optimization (TACO), Volume 7, Issue 1, April 2010
  [paper] [bibtex]

• Flexible Architectural Support for Fine-Grain Scheduling, Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis, in Proceedings of the 15th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XV), March 2010
  [paper] [talk] [bibtex]

• Implementing Signatures for Transactional Memory, Daniel Sanchez, Luke Yen, Mark D. Hill, Karthikeyan Sankaralingam, in Proceedings of the 40th annual IEEE/ACM international symposium on Microarchitecture (MICRO-40), December 2007
  [paper] [talk] [bibtex]

• Design and Implementation of Signatures for Transactional Memory Systems, Daniel Sanchez, Technical Report CS-TR-2007-1611, University of Wisconsin-Madison, September 2007
  [paper] [talk] [bibtex]

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